Develops preSilicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests.
Analyzes and uses results to modify testing.
Every mobile device needs a battery in order to stay connected and functioned. Longer battery life is the energy saving trend.
We would like to invite YOU to join Intel, working on the energy saving intellectual property IP development i.e. the Power Management Controller IP PMC IP.
PMC IP manages device's power operations. As a design verification engineer you get to develop pre-silicon functional validation tests to verify PMC IP design requirements.
You create test plans for RTL validation, define and execute system simulation models, and find and implement corrective measures for test failures.
You also analyze and use test results to improve test bench, and make use of various validation tools such as Scoreboards, Checkers, Generators, Bus Functional Models, etc.
In this position you will work closely with design architects and micro-architects, as well as design teams in determining the proper validation strategy for new design, defining and providing feedback on test plans, developing and implementing white box coverage plans, participating and reviewing validation codes for efficiency and coverage, and driving any paradigm shifts needed in validation execution.
Minimum Qualifications- Bachelor of Science degree or Master of Science degree in Electrical / Electronic Engineering, Computer Engineering or Computer Science with hardware design focus.
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms.
PEG strives to lead the industry moving forward through product innovation and world class engineering.